❶ Catalog of Omron PLC Programming Instructions and Ladder Diagram Quick Start
Chapter 1 PLC Programming Software and Simulation Software 1
1.1 Overview 1
1.2 Programming Software CX-Programmer1
1.2.1 Install CX-Programmer programming software1
1.2.2 Main functions of CX-Programmer programming software2
1.2.3 Use of CX-Programmer programming software4
1.3 Simulation software CX-Simulator12
1.3.1 System requirements 12
1.3.2 Software usage 13
Chapter 2 PLC instruction system and programming language 15
2.1 Overview 15
2.2 Instruction System 15
2.2.1 Basic Instructions 16
2.2.2 Functional Instructions 17
2.3 Programming Languages 17
2.3.1 Basic Features of Programming Languages 17
2.3.2 Programming Language Form 18
Chapter 3 Timing Instructions 21
3.1 Timing Input Instructions 22
3.1.1 Read LD/Read? Non-LDNOT22
3.1 .2 AND AND/AND? NOT ANDNOT23
3.1.3 OR OR/OR? NOT ORNOT23
3.1.4 Block? AND ANDLD24
3.1.5 Block? OR ORLD24
3.1 .6 Non-NOT(520) 25
3.1.7 PF rising edge differential UP(521) 25
3.1.8 PF falling edge differential DOWN(522) 25
3.1.9 LD type? Bit test LDTST (350)/LD type? Bit test non-LDTSTN (351) 26
3.1.1 0AND type? Bit test ANDTST (350)/ANDLD type? Bit test non-ANDTSTN (351) 26
3.1.1 1OR type? Bit test ORTST(350)/OR type? Bit test non-ORTSTN(351) 27
3.2 Timing output instruction 27
3.2.1 Output OUT/output non-OUTNOT27
3.2.2 Temporary storage relay TR28
3.2.3 Hold KEEP(011)28
3.2.4 Differential on rising edge DIFU(013) 29
3.2.5 Differential on falling edge DIFD(015)29
3.2.6 Set SET/Reset Bit RSET29
3.2.7 Multi-bit bit SETA(530)30
3.2.8 Multi-bit reset RSTA(531) 30
3.2.9 1-bit bit SETB(532)/1-bit reset RSTB (533) 31
3.2.1 01-bit output OUTB (535) 31
3.3 Timing control instruction 32
3.3.1 End END (001) 32
3.3.2 None Function NOP(000) 32
3.3.3 Interlock IL(002)/Interlock Release ILC(003) 33
3.3.4 Multiple Interlock (Derivative Flag Hold Type) MILH(517)/Multiple Interlock (differential flag non-retentive type)
MILR(518)/Multiple interlock release MILC(519)33
3.3.5 Transfer JMP(005)/Transfer end JME(005)34
3.3.6 Conditional branch CJP(510)/Conditional non-branch CJPN(511)/Transition end JME(005)35
3.3.7 Multiple branch JMP0(515)/Multiple branch end JME0(516)35
3.3.8 Loop Start FOR(512)/Loop End NEXT(513) 36
3.3.9 Loop Interrupt BREAK(515) 37
Chapter 4 Timer/Counter Instructions 38
4.1 Timer instruction 38
4.1.1 Timer TIM/TIMX(550)38
4.1.2 High-speed timer TIMH(015)/TIMHX(551)39
4.1.3 Super high speed Timer TMHH(540)/TMHHX(552)39
4.1.4 Retentive timer TTIM(087)/TTIMX(555)40
4.1.5 Long time timer TIML(542)/TIMLX( 553) 41
4.1.6 Multi-Output Timer MTIM(543)/MTIMX(554) 41
4.2 Counter Instructions 42
4.2.1 Counter CNT/CNTX(546) 42
4.2.2 Reversible Counter CNTR(012)/CNTRX(548)43
4.2.3 Timer/Counter Reset CNR(545)/CNRX(547)43
Chapter 5 Data Command 44
5.1 Data comparison instruction 46
5.1.1 Symbol comparison =, , <, , >= (S, L) (LD/AND/OR type) (300~328) 46
5.1.2 Time comparison=DT, DT, <DT, DT, >=DT (LD/AND/OR type) (341~346) 49
5.1. 3 Unsigned Compare CMP(020)/Unsigned Double Compare CMPL(060) 50
5.1.4 Signed BIN Compare CPS(114)/Signed BIN Double Compare CPSL(115) 50
5.1.5 Multi-Channel Comparison MCMP(019) 51
5.1.6 Table Consistency TCMP(085) 51
5.1.7 Unsigned Table Comparison BCMP(068) 52
5.1.8 Extensions Comparison between tables BCMP2(502)52
5.1.9 Area comparison ZCP(088)/Multiple area comparison ZCPL(116)53
5.2 Data transfer instruction 54
5.2.1 Transfer MOV ( 021)/Multiple transmission MOVL(498)54
5.2.2 Negative transmission MVN(022)/Negative double transmission MVNL(499)54
5.2.3 Bit transmission MOVB(082)55
5.2.4 Digital transfer MOVD(083)55
5.2.5 Multi-bit transfer XFRB(062)56
5.2.6 Block transfer XFER(070)56
5.2.7 Block setting Set BSET (071) 57
5.2.8 Data exchange XCHG (073)/Data double length exchange XCGL (562) 57
5.2.9 Data allocation DIST (080) 57
5.2.1 0 Data extraction COLL (081) 58
5.2.1 1 Index register setting MOVR (560)/MOVRW (561) 58
5.3 Data shift instruction 59
5.3.1 Shift Register SFT(010) 59
5.3.2 Left and Right Shift Register SFTR(084) 59
5.3.3 Asynchronous Shift Register ASFT(017) 60
5.3.4 Word Shift WSFT (016) 60
5.3.5 1-bit left shift ASL (025)/1-bit double-length left shift ASLL (570) 60
5.3.6 1-bit right shift ASR (026)/ 1-bit double right shift ASRL(571) 61
5.3.7 with CY leftRotation 1-bit ROL (027)/With CY double length left rotation 1-bit ROLL (572) 61
5.3.8 Without CY left rotation 1-bit RLNC (574) / Without CY double-length left rotation 1-bit RLNL (576 ) 62
5.3.9 with CY right round 1 bit ROR (028) / with CY double length right round 1 bit RORL (573) 62
5.3.1 0 without CY right round 1 bit RRNC (575 )/No CY Double Length Right Rotation 1-bit RRNL(577) 62
5.3.1 11-bit Left Shift SLD(074) 63
5.3.1 21-bit Right Shift SRD(075) 63< 5.3.1 3N-bit data shift left NSFL(578) 64
5.3.1 4N-bit data shift right NSFR(579) 64
5.3.1 5N-bit left shift NASL(580 )/N-bit multiple left shift NSLL(582) 65
5.3.1 6N-bit right shift NASR(581)/N-bit multiple right shift NSRL(583) 65
5.4 Data conversion Instruction 66
5.4.1 BCD→BIN conversion BIN (023)/BCD→BIN double length conversion BINL (058) 66
5.4.2 BIN→BCD conversion BCD (024)/BIN→BCD double length Convert BCDL(059) 66
5.4.3 2’s Complement Convert NEG(160)/2’s Complement Multiple Convert NEGL(161) 67
5.4.4 Sign Extend SIGN(600) 68
5.4.5 4→16/8→256 Decoder MLPX(076) 68
5.4.6 16→4/256→8 Encoder DMPX(077) 69
5.4.7 ASCII Code Conversion ASC (086) 70
5.4.8 ASCII→HEX conversion HEX (162) 70
5.4.9 Bit column→bit line conversion LINE (063) 71
5.4.1 0-bit line →Bit string conversion COLM(064)71
5.4.1 1 signed BCD→BIN conversion BINS(470) 72
5.4.1 2 signed BCD→BIN double length conversion BISL(472)73< 5.4.1 3-signed BIN→BCD conversion BCDS (471) 74
5.4.1 4-signed BIN→BCD double-length conversion BDSL (473) 75
5.4.1 5 Gray code conversion GRY(474) 76
5.5 Data Control Instructions 77
5.5.1 PID Operation PID(190)77
5.5.2 Self-tuning PID operation PIDAT(191)78
5.5.3 Upper and lower limit control LMT(680)79
5.5.4 Dead zone control BAND (681) 80
5.5.5 Dead zone control ZONE (682) 81
5.5.6 Time division ratio output TPO (685) 81
5.5.7 Fixed calibration ratio SCL (194) 82
5.5.8 Fixed calibration ratio 2SCL2 (486) 83
5.5.9 Fixed calibration ratio 3SCL3 (487) 83
5.5.1 0 Data averaging AVG (195) 84
5.6 Table data processing instructions 85
5.6.1 Stack area setting SSET (630) 85
5.6.2 Stack data storage PUSH (632) 86
5.6.3 LIFO (634) ) 86
5.6.4 FIFO(633) 87
5.6.5 Table area declaration DIM(631) 87
5.6.6 Record position setting SETR(635) 88
5.6.7 Record Position Read GETR(636)88
5.6.8 Data Retrieval SRCH(181)89
5.6.9 Byte Swap SWAP(637)89
5.6.1 0 Maximum value retrieval MAX(182) 90
5.6.1 1 Minimum value retrieval MIN(183) 91
5.6.1 2 Summation SUM(184) 91
5.6.1 3FCS value calculation FCS(180) 92
5.6.1 4 stack data number output SNUM(638) 92
5.6.1 5 stack data see SREAD(639) 93
5.6.1 6 stack data update SWRIT (640) 93
5.6.1 7-Stack Data Insertion SINS(641) 94
5.6.1 8-Stack Data Delete SDEL(642) 94
Chapter 6 Operation Instructions 96
6.1 Self-increment/subtraction instructions (increment/decrement instructions) 99
6.1.1 BIN increment++ (590)/BIN double-length increment++L (591) 99
6.1. 2 BIN decrement–(592)/BIN double-length decrement–L(593) 100
6.1.3 BCD increment++B(594)/BCD double-length increment++BL(595) 101
6.1.4 BCD decrement–B(596)/BCD double-length decrement- -BL(597) 102
6.2 Four arithmetic instructions 103
6.2.1 Signed? No CYBIN addition+(400)/Signed? No CYBIN double-length addition+L(401) 103
6.2.2 Sign? With CYBIN addition+C(402)/Sign?With CYBIN double addition+CL(403)104
6.2.3 Without CYBCD addition+B(404)/without CYBCD double addition+ BL(405) 105
6.2.4 Addition with CYBCD+BC(406)/Addition with double length of CYBCD+BCL(407)105
6.2.5 Signed? Subtraction without CYBIN-(410)/ Signed? Without CYBIN double-length subtraction – L(411) 106
6.2.6 Signed? With CYBIN subtraction – C(412) / Signed? With CYBIN double-length subtraction – CL(413) 107
6.2 .7 Subtraction without CYBCD – B(414) / Subtraction without CYBCD double length – BL(415) 108
6.2.8 Subtraction with CYBCD – BC(416) / Subtraction with CYBCD double length – BCL(417) 109
6.2.9 Signed BIN Multiplication*(420)/Signed BIN Multiplication*L(421)110
6.2.1 0 Unsigned BIN Multiplication*U(422)/Unsigned BIN Multiplication Multiplication *UL(423) 111
6.2.1 1BCD Multiplication*B(424)/BCD Multiplication*BL(425)111
6.2.1 2 Signed BIN Division/(430)/Band Signed BIN double-length division/L(431) 112
6.2.1 3 unsigned BIN division/U(432)/unsigned BIN double-length division/UL(433) 113
6.2.1 4BCD division /B(434)/BCD double length division/BL(435) 114
6.3 Logical operation instructions 114
6.3.1 Word logical product ANDW(034)/Word multiple logical product ANDL(610) 114
6.3.2 Word logical sum ORW(035)/word multiple logical sum ORWL(611) 115
6.3.3 Word logical sum XORW(036)/word multiple logical sum XORL (612) 116
6.3.4 Word XOR XNRW (037)/XOR XNRL(613)116
6.3.5 Bit-reversed COM(029)/Bit-multiple-reversed COML(614) 117
6.4 Special operation instructions 118
6.4.1 BIN square root operation ROTB (620) 118
6.4.2 BCD square root operation ROOT (072) 118
6.4.3 Numeric conversion APR (069) 119
6.4.4 Floating point division (BCD) FDIV (079) 119
6.4.5 Bit count BCNT (067) 120
6.5 Floating point conversion? Operation instruction 120
6.5.1 Floating point → 16-bit BIN conversion FIX ( 450) 120
6.5.2 Floating point → 32-bit BIN conversion FIXL(451) 121
6.5.3 16-bit BIN → floating point conversion FLT(452) 121
6.5.4 32-bit BIN→Floating point conversion FLTL(453) 121
6.5.5 Floating point addition + F(454) 122
6.5.6 Floating point subtraction – F(455) 122
6.5.7 Floating Point Multiplication*F(456)122
6.5.8 Floating Point Division/F(457)123
6.5.9 Angle→Radan Conversion RAD(458)123
6.5.1 0Radian→ Angle conversion DEG(459) 123
6.5.1 1SIN operation SIN(460) 124
6.5.1 2COS operation COS(461) 124
6.5.1 3TAN operation TAN(462) 124
6.5.1 7 square root operations SQRT(466) 126
6.5.1 8 exponential operations EXP(467) 126
6.5.1 9 logarithmic operations LOG(468) 126
6.5.2 0 power operation PWR(840) 127
6.5.2 1 single precision floating point data comparison=F, F, <F, F, >=F (LD/AND/OR type )
(329~334) 127
6.5.2 2 Floating point → string conversion FSTR(448) 128
6.5.2 3 String → floating point conversion FVAL(449) 129
6.6 (Double) Double-precision floating-point conversion? Operation instruction 130
6.6.1 Floating point→16-bit BIN conversion FIXD (841) 130
6.6.2 Floating point→32-bit BIN conversion FIXLD (842) 130
6.6.3 16-bit BIN→floating point conversion DBL(843) 130
6.6.4 32-bit BIN→floating point conversion DBLL(844) 131
6.6.5 Floating point addition+D (845) 131
6.6.6 Floating-point subtraction – D(846) 131
6.6.7 Floating-point multiplication × D(847) 132
6.6.8 Floating-point division/D(848 ) 132
6.6.9 Angle→radian conversion RADD(849) 132
6.6.1 0 radian→angle conversion DEGD(850) 133
6.6.1 1SIN operation SIND(851) 133< 6.6.1 2COS operation COSD(852) 133
6.6.1 3TAN operation TAND(853) 134
6.6.1 4SIN?1 operation ASIND(854) 134
6.6.1 5COS?1 operation ACOSD(855) 134
6.6.1 6TAN?1 operation ATAND(856) 135
6.6.1 7 square root operation SQRTD(857) 135
6.6.1 8 exponential operation EXPD(858) 135
6.6.1 9 logarithmic operations LOGD(859) 136
6.6.2 0 power operations PWRD(860) 136
6.6.2 1x precision floating point data Comparison=D, D, <D, D, >=D (LD/AND/OR type)
(335~340) 136
Chapter 7 Subroutine and Interrupt Control Instruction 138
7.1 Subroutine Instruction 138
7.1.1 Subroutine call SBS(091) 138
7.1.2 Macro MCRO(099) 139
7.1.3 Subroutine enter SBN (092)/Subroutine returns RET(093) 140
7.1.4 Global subroutine calls GSBS(750) 140
7.1.5 Global subroutine enters GSBN(751)/Global subroutine returns GRET( 752) 141
7.2 Interrupt Control Instructions 142
7.2.1 Interrupt Mask Group MSKS(690) 142
7.2.2 Interrupt Mask Read MSKR(692) 143
7.2.3 Interrupt release CLI(691) 144
7.2.4 Interrupt task execution prohibition DI(693) 144
7.2.5 Interrupt task execution prohibition release EI(694) 145
Chapter 8 Instructions for I/O Units and High-speed Counting/Pulse Output 146
8.1 Instructions for I/O Units 147
8.1.1 I/O Refresh IORF(097) 147
8.1.2 7-segment decoder SDEC (078) 147
8.1.3 Digital switch DSW (210) 148
8.1.4 10-key input TKY (211) 148
8.1.5 16-key input HKY (212) 149
8.1.6 Matrix Input MTR (213) 149
8.1.7 7 Segment Display 7SEG (214) 150
8.1.8 Smart I/O Readout IORD (222) 150
8.1.9 Intelligent I/O write IOWR(223) 151
8.1.1 0CPU high-function unit refreshes DLNK(226) every time I/O 151
8.2 High-speed count/pulse Output command 152
8.2.1 Operation mode control INI (880) 152
8.2.2 Pulse current value read PRV (881) 153
8.2.3 Pulse frequency conversion PRV2 (883) 153
8.2.4 Comparison table registration CTBL (882) 154
8.2.5 Frequency setting SPED (885) 154
8.2.6 Pulse amount setting PULS (886) 155
8.2 .7 Positioning PLS2 (887) 156
8.2.8 Frequency acceleration and deceleration control ACC (888) 156
8.2.9 Origin search ORG (889) 157
8.2.1 0PWM output PWM (891 ) 158
Chapter 9 Communication Commands 159
9.1 Serial Communication Commands 160
9.1.1 Protocol Macro PMCR(260) 160
9.1.2 Serial Port Output TXD(236 ) 160
9.1.3 Serial Port Input RXD(235) 161
9.1.4 Serial Communication Unit Serial Port Output TXDU(256) 161
9.1.5 Serial Communication Unit String Line port input RXDU(255) 162
9.1.6 Serial port communication setting change STUP(237) 163
9.2Network communication command 163
9.2.1 Network send SEND (090) 163
9.2.2 Network receive RECV (098) 164
9.2.3 Command send CMND (490) 164
9.2.4 General Explicit information sending command EXPLT (720) 165
9.2.5 Explicit read command EGATR (721) 165
9.2.6 Explicit write command ESATR (722) 166
9.2.7 ExplicitCPU Unit Data Read Instruction ECHRD(723) 166
9.2.8 ExplicitCPU Unit Data Write Instruction ECHWR(724) 167
Chapter 10 Block Instructions 168
10.1 Block Program Instructions 169
10.1.1 Block Program BPRG(096)/Block Program End BEND(801) 169
10.1.2 Block Program Temporarily Stop BPPS(811)/Block Program Restart BPRS(812) 169
10.1.3 CONDITIONAL END EXIT(806)/CONDITIONAL END(NOT)EXITNOT(806) 170
10.1.4 Conditional branch block IF(802)/Conditional branch block(non)IFNOT(802)/ Conditional Branch Pseudo-Block
ELSE(803)/Conditional Branch Block End IEND(804) 170
10.1.5 1 Scan Condition Wait WAIT(805)/1 Scan Condition Wait (NOT)WAITNOT(805) 171
10.1.6 Timing wait TIMW(813)/TIMWX(816)172
10.1.7 Counting wait CNTW(814)/CNTWX(818) 173
10.1.8 High-speed timing wait TMHW( 815)/TMHWX(817)173
10.1.9 Repeat Block LOOP(809)/Repeat Block End LEND(810)/Repeat Block End (NOT)LEND
NOT(810) 174
10.2 Function block uses special instructions 175
Variable types to obtain GETID (286) 175
Chapter 11 String processing instructions and special instructions 176
11.1 String processing instructions 176
11.1. 1 String? Send MOV$(664) 176
11.1.2 String? Concatenate +$(656) 177
11.1.3 String? Read from left LEFT$(652) 177
11.1.4 String? Read RGHT$(653) 178 from right
11.1.5 String? Read MID$(654) 178 from any position
11.1.6 String? Retrieve FIND$(660) 179
11.1.7 String? Length Check LEN$(650) 179
11.1.8 String? Replace RPLC$(661) 180
11.1.9 Characters String? Delete DEL$(658) 180
11.1.1 0 String? Swap XCHG$(665) 181
11.1.1 1 String? Clear CLR$(666) 181
11.1 .1 2 strings? Insert INS$(657) 182
11.1.1 3 strings compare LD, AND, OR=$, $, <$, $, >=$ ( 670~675) 182
11.2 Special instructions 183
11.2.1 Set carry/clear carry STC(040)/CLC(041)183
11.2.2 Cycle time monitoring time setting WDT ( 094) 184
11.2.3 Condition Flags Save CCS(282)/Condition Flags Load CCL(283) 184
11.2.4 CV→CS Address Translation FRMCV(284) 185
11.2.5 CS→CV Address Conversion TOCV(285) 186
Chapter 12 Other Instructions 187
12.1 Process (Program) Step Control Instructions 188
Step Trapezoid Area Step SNXT(009)/Step Trapezoid Area definition STEP (008) 188
12.2 Display (table) function instruction 189
Information display MSG (046) 189
12.3 Clock function instruction 190
12.3.1 Calendar Addition CADD(730) 190
12.3.2 Calendar Subtraction CSUB(731) 190
12.3.3 Hours, Minutes, Seconds → Seconds Conversion SEC(065) 191
12.3.4 Seconds → Hours, Minutes, Seconds Conversion HMS (066) 191
12.3.5 Clock correction DATE (735) 192
12.4 Debug processing instruction 192
Trace memory sampling TRSM (045) 192
12.5 Troubleshooting instruction 193
12.5.1 Troubleshooting for continuous operation FAL(006) 193
12.5.2 Troubleshooting for stopping operation FALS(007) 194
12.5. 3 Fault point detection FPD (269) 195
12.6 Task control instruction 195
12.6.1 Task execution start TKON (820) 195
12.6.2 Task execution standby TKOF (821) 196
12.7 Model conversion command 197
12.7.1 Block transfer XFERC(565) 197
12.7.2 Data allocation DISTC(566) 198
12.7.3 Data extraction COLLC(567) 199
12.7.4 bit transfer MOVBC(568) 200
12.7.5 bit count BCNTC(621) 200
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